| Usually, when we want to choose a data | | | | from the same point in time - as if they were |
| acquisition system, we look at three main | | | | sampled simultaneously. While this architecture |
| specifications. The sample rate, the bit resolution | | | | does solve the time delay problem, it has several |
| and the number of channels. While these | | | | disadvantages. The first one is that the sample |
| specifications are very important, there is another | | | | rate of the ADC must divide between the |
| characteristic that we tend to forget - | | | | number of input channels. This means that if you |
| simultaneous sampling. | | | | have an ADC that samples at up to 1 Mhz, and |
| The simplest multi-channel DAQ architecture | | | | you have 10 input channels, then the max sample |
| consists of a multiplexer (MUX), an amplifier (AMP) | | | | rate per channel is actually 100 khz (assuming that |
| and an analog to digital converter (ADC). All the | | | | you are using all the channels). In reality, the |
| input channels are connected to the MUX, which | | | | sample rate is even lower (by about 30%), due |
| sends each channel through the amplifier to the | | | | to latency of the SSH circuit and the MUX. |
| ADC to be converted into digital data. This means | | | | Another architecture is one that uses multiple |
| that each channel is sampled at a different time, | | | | ADCs. One for every channel. This architecture is |
| which results in a time delay between contiguous | | | | also much less complex. There is no need for |
| samples. A DAQ system which overcomes this | | | | SSH switching and a MUX. Each input channel is |
| time delay problem is called a Simultaneous DAQ | | | | connected to its own amplifier and ADC. This |
| System. | | | | architecture achieves the higher sample rates per |
| There are two common simultaneous sampling | | | | channel and better dynamic accuracy. That is why |
| architectures. One that uses a sample-hold | | | | the multiple ADC approach is known to be the |
| mechanism (SSH) and one that uses multiple | | | | best architecture for simultaneous data acquisition |
| analog to digital converters (ADCs). The SSH | | | | systems. |
| circuit has two modes, sample and hold. In sample | | | | So why don't all data acquisition systems use the |
| mode, it tracks the input analog voltage. In hold | | | | multiple ADC architecture? Well, the answer is, as |
| mode, it holds the current voltage at a constant | | | | you must have guessed, the cost. The ADC is |
| value. This is usually done by a switch and a | | | | one of the most expensive item in the DAQ |
| capacitor. The SSH simultaneous sampling | | | | system, and using one for every channel |
| architecture places a SSH circuit before each | | | | increases the cost considerably. But sometimes it |
| channel is inserted into the multiplexer, and sets | | | | is worth it to pay the extra buck. Especially when |
| their mode to sample and hold at the same time. | | | | there is a need to take advantage of all the |
| The result is that each channel is sampled | | | | channels that the DAQ system has to offer. |
| separately, but the values of the digitized data are | | | | |