| sp; Why was there such a rush in the | | | | Bus mastering involves the concept that the |
| development of the vintage computer bus? | | | | peripheral CPUS could request permission to take |
| All in all there were a number of ongoing | | | | over the bus for a short period of time. The main |
| improvements. These included. 32 bit widths. Bus | | | | CPU would grant permission for them to take |
| mastering. Less susceptible to noise in that they | | | | over the bus, and it would temporarily drop |
| were quieter’ in signal transmission. | | | | out of the loop, enabling swift |
| More convenience of setup of add on boards via | | | | communications between for example the hard |
| software. | | | | drive and floppy disk drive. As computer busses |
| The ISA bus came in only 8 bit and 16 bit | | | | developed and had the inherent abilities to transfer |
| formats. Whereas the later 386 and 486 chips , in | | | | more and more data in a given time period noise |
| both the DX and SX formats while they did have | | | | became an issue. The ISA bus was fairly noise |
| a 32 bit path were hobbled by the ISA bus. As a | | | | prone because it relied on triggered interrupts. |
| result they could never realize their true 32 bit | | | | Whenever the voltage level on the data line of |
| speed potential. Later buses such as the MCA and | | | | the bus exceeded a given threshold value then |
| EISA busses were able to overcome these | | | | Edge Triggering would result. |
| inherent limitations. | | | | The alternative to this situation where Edge |
| Thee data highways referred to as : | | | | Triggering could result is level triggering |
| busses are the data transmission lines around | | | | where it is required that the transmitting hold and |
| the PCs. The bus serves as the path for | | | | archive the higher voltage level in order for data |
| information transmission around the PC. True this | | | | to be recognized by the devices on the bus. Edge |
| routing is controlled by the CPU. However as that | | | | Triggering however can lead to transients |
| point in vintage computing history this was not an | | | | — that is brief power surges that can |
| issue. The PCs were stand alone single CPU units. | | | | confuse the devices on the bus into thinking that |
| However as time went on and PCs got faster | | | | data is on the bus when it is not. Luckily level |
| and more complicated with less expensive | | | | triggering lowers the noise level and both MCA |
| additional CPUs handling other tasks within the PCs | | | | and EISA employ it. As a result of all of these |
| events became dicer.Onboard peripherals | | | | inherent benefits MCA and EISA came to support |
| themselves began to have built in CPUs. CPUS in | | | | the idea, which we know take for granted, of |
| different manners began to be found in such | | | | instant software configurations. There were no |
| peripherals as hard drives, sound and video cards. | | | | switches or jumpers on add in MCA or EISA |
| The overall computer system may become much | | | | boards. Although we take plug and play instant |
| more efficient if these in essence peripheral CPUs | | | | configuration of mother boards and peripherals |
| can communicate directly with each other. without | | | | such as sound, video or network cards for |
| having to use the main CPU as an intermediary. | | | | granted it was not always that way. We owe a |
| Hence MCA and EISA were developed with these | | | | lot to these early computer innovations of |
| roles in mind. The concept became known as | | | | improving the computer bus. |
| bus mastering. | | | | |